Arcane  v3.16.2.0
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TestVector2.cc
1// -*- tab-width: 2; indent-tabs-mode: nil; coding: utf-8-with-signature -*-
2//-----------------------------------------------------------------------------
3// Copyright 2000-2024 CEA (www.cea.fr) IFPEN (www.ifpenergiesnouvelles.com)
4// See the top-level COPYRIGHT file for details.
5// SPDX-License-Identifier: Apache-2.0
6//-----------------------------------------------------------------------------
7
8#include <gtest/gtest.h>
9
10#include "arcane/utils/Vector2.h"
11
12/*---------------------------------------------------------------------------*/
13/*---------------------------------------------------------------------------*/
14
15using namespace Arcane;
16
17TEST(TestVector2, Misc)
18{
19 {
20 Int64x2 v0;
21 ASSERT_EQ(v0.x, 0);
22 ASSERT_EQ(v0.y, 0);
23 }
24 {
25 Int64x2 v0;
26 Int64x2 v1(2, 7);
27 ASSERT_EQ(v1.x, 2);
28 ASSERT_EQ(v1.y, 7);
29 Int64x2 v2(v1);
30 ASSERT_TRUE(v1 == v2);
31 ASSERT_FALSE(v1 != v2);
32 ASSERT_TRUE(v2 != v0);
33 v0 = v2;
34 ASSERT_TRUE(v2 == v0);
35 std::cout << "V0=" << v0 << "\n";
36 std::cout << "V1=" << v1 << "\n";
37 std::cout << "V2=" << v2 << "\n";
38 ASSERT_FALSE(v0 < v2);
39 ASSERT_FALSE(v2 < v0);
40 Int64x2 v3(1, 5);
41 Int64x2 v4(2, 3);
42 Int64x2 v5(2, 7);
43 ASSERT_TRUE(v3 < v2);
44 ASSERT_TRUE(v4 < v2);
45 ASSERT_TRUE(v4 < v5);
46 }
47 {
48 Int64x2 v2({1});
49 ASSERT_EQ(v2.x, 1);
50 ASSERT_EQ(v2.y, 0);
51 Int64x2 v3({1,2});
52 ASSERT_EQ(v3.x, 1);
53 ASSERT_EQ(v3.y, 2);
54 Int64x2 v4({1,2,3});
55 ASSERT_EQ(v4.x, 1);
56 ASSERT_EQ(v4.y, 2);
57 }
58 {
59 Int64x2 v1(1, -2);
60 Int64x2 v2(3, 5);
61 Int64x2 sum_v1_v2(4, 3);
62 Int64x2 mul_v1_4(4, -8);
63 ASSERT_EQ((v1 + 7), Int64x2(8, 5));
64 ASSERT_EQ((7 + v1), Int64x2(8, 5));
65 ASSERT_EQ((v1 - 9), Int64x2(-8, -11));
66 ASSERT_EQ((v1 + v2), sum_v1_v2);
67 Int64x2 v3 = v1;
68 v3 += v2;
69 ASSERT_EQ(v3, sum_v1_v2);
70 v3 -= v2;
71 ASSERT_EQ(v3, v1);
72 v3 -= -5;
73 ASSERT_EQ(v3, (v1 + 5));
74 Int64x2 v4 = (v1 * 4);
75 ASSERT_EQ(v4, mul_v1_4);
76 ASSERT_EQ((4 * v1), mul_v1_4);
77 ASSERT_EQ((v4 / 4), v1);
78 Int64x2 v5 = v4;
79 v5 /= 4;
80 ASSERT_EQ(v5, v1);
81 Int64x2 v6 = -v1;
82 ASSERT_EQ(v6, Int64x2(-1, 2));
83 }
84}
85
86/*---------------------------------------------------------------------------*/
87/*---------------------------------------------------------------------------*/
ASSERT_FALSE
#define ASSERT_FALSE(condition)
Vérifie que condition est faux.
Definition Assertion.h:138
ASSERT_TRUE
#define ASSERT_TRUE(condition)
Vérifie que condition est vrai.
Definition Assertion.h:126
Arcane
-*- tab-width: 2; indent-tabs-mode: nil; coding: utf-8-with-signature -*-
Definition AcceleratorGlobal.h:36